Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje

Prohaska, Timotej

undergraduate thesis

Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje

Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2017. urn:nbn:hr:200:091624

Prohaska, Timotej

Josip Juraj Strossmayer University of Osijek
Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Department of Computer Engineering and Automation
Chair of Automation and Robotics

Cite this document

APA 6th Edition

Prohaska, T. (2017). Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje (Undergraduate thesis). Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek. Retrieved from https://urn.nsk.hr/urn:nbn:hr:200:091624

MLA 8th Edition

Prohaska, Timotej. "Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje." Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, 2017. https://urn.nsk.hr/urn:nbn:hr:200:091624

Chicago 17th Edition

Harvard

Prohaska, T. (2017). 'Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje', Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, accessed 23 September 2023, https://urn.nsk.hr/urn:nbn:hr:200:091624

Vancouver

Prohaska T. Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje [Undergraduate thesis]. Osijek: Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek; 2017 [cited 2023 September 23] Available at: https://urn.nsk.hr/urn:nbn:hr:200:091624

IEEE

T. Prohaska, "Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje", Undergraduate thesis, Josip Juraj Strossmayer University of Osijek, Faculty of Electrical Engineering, Computer Science and Information Technology Osijek, Osijek, 2017. Available at: https://urn.nsk.hr/urn:nbn:hr:200:091624

Cite this item: https://urn.nsk.hr/urn:nbn:hr:200:091624

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Metadata

Title	Problem zaleta regulatora i izvedbe funkcije za njegovo sprečavanje
Author	Timotej Prohaska
Mentor	Dražen Slišković (mentor)
Mentor	Ratko Grbić (mentor)
Committee member	Emmanuel Karlo Nyarko (predsjednik povjerenstva)
Committee member	Dražen Slišković (član povjerenstva)
Committee member	Ratko Grbić (član povjerenstva)
Granter	Josip Juraj Strossmayer University of Osijek Faculty of Electrical Engineering, Computer Science and Information Technology Osijek (Department of Computer Engineering and Automation) (Chair of Automation and Robotics) Osijek
Defense date and country	2017-04-06, Croatia
Scientific / art field, discipline and subdiscipline	TECHNICAL SCIENCES Electrical Engineering Automation and Robotics
Abstract	Glavni zadatak ovog rada bio je prikazati i usporediti kakvoću regulacije u regulacijskim krugovima prilikom nastupanja efekta zaleta kada regulator posjeduje funkciju za sprječavanje. Problem zaleta regulatora (wind-up effect) je nepoželjan efekt u regulacijskim krugovima koji se događa kod regulatora koji imaju integralno vladanje, a u regulacijskom krugu postoji amplitudno ograničenje. Kada izvršni član uđe u ograničenje povratna veza se prividno prekida i sustav radi u otvorenoj pelji što izaziva drastično pogoršanje kakvoće regulacije. Kako bi se smanjio utjecaj takvog efekta potrebno je primjeniti metode sprječavanja efekta zaleta. U praksi se najčešće koriste tri metode: povratno integriranje, uvjetno integriranje i automatsko resetiranje. Simulacijom u Matlabu prikazana je efikasnost svake metode na dva tipa regulacijskih krugova s PT2 i IT1 procesima, koji se upravljaju s PI regulatorom.
Abstract (english)	The main task of this thesis was to show and compare quality in regulation circuits during appereance of windup effect when regulator has function for it's prevention. Wind-up problem of regulator is undesirable effect in regulation circuits which is happening when regulator have integrally conduct and when there is amplitude limitation. When control signal enters the restriction feedback stops and system works in open loop which causes drastic deterioration quality of regulation. To reduce the imapct of that effect it is necessary to apply methods that are developed for that cases. The most commonly used methods in praxis are: back calculation, conditional integration and automatic reset. Simulation models that were made in Matlab shows the efficiency of every methods which are implemented on regulation circuits with PI regulator and PT2, IT1 processes and quality of regulation in graphic form and results in numeric indices.
Keywords
Keywords (english)
Language	croatian
URN:NBN	urn:nbn:hr:200:091624
Study programme	Title: Professional study programme of Electrical Engineering; specializations in: Power Engineering, Automation, Informatics Course: Automation Study programme type: professional Study level: undergraduate Academic / professional title: stručni/a prvostupnik/prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike (stručni/a prvostupnik/prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike)
Type of resource	Text
File origin	Born digital
Access conditions	Open access
Terms of use
Repository	Faculty of Electrical Engineering, Computer Science and Information Technology Osijek
Created on	2017-07-24 07:19:44